Technical Field
The invention relates to the technical field of electronics, in particular to a power on reset circuit applied to wireless charging control chips.
Description of Related Art
Generally, in the power on initial stage of a circuit system, the power voltage has not reached an expected stable state yet, and consequentially, the voltage and logical state of many circuit devices (such as semiconductor devices) and circuit nodes are instable. To make sure that the circuit system always starts to operate in a state expected by designers after being powered on, in a period of time after a power supply is stabilized, a power on reset (POR) circuit can be used to generate a reset signal to make the circuit system in the initial state expected by the designers, and after the valid time of the reset signal, the circuit system starts to operate in the expected initial state. Namely, the power on reset circuit can reset other modules in the circuit system, thereby eliminating the instable state of the circuit modules in the power on initial stage.
Traditional power on reset circuits adopt PMOSs to charge capacitors, and the voltage of capacitor plates is slowly increased and is output after being shaped by several stages of inverters. However, by adoption of this circuit structure, if the power voltage jitters within the input voltage range VIL-VIH of the inverters in the power on stage, the power on reset output signal will jump, which possibly results in abnormities of other circuit modules in the chip. In addition, in order to prolong the power on reset time, the width to length ratio of charging PMOS transistors of the circuits has to be decreased, or the area of the capacitors has to be increased, and consequentially, the area of the chip is increased, and the layout of the chip is changed. From the above description, the traditional power on reset circuits have the following disadvantages: Firstly, the power on reset output signal is instable and is likely to jump, which possibly results in abnormities of other circuit modules in the chip; and secondly, the power on reset time is difficult to adjust.